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Data Sheet, Rev. 1.0, May 2007
BTM7740G
TrilithIC
Automotive Power
BTM7740G
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 2 2.1 2.2 3 4 4.1 4.2 4.3 4.4 4.5 4.6 5 5.1 5.2 5.3 5.4 6 7 8 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Status Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8 8 8 8 8 8
10 10 11 11 12
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Data Sheet
2
Rev. 1.0, 2007-05-21
TrilithIC
BTM7740G
1
Features * * * *
Overview
Quad D-MOS switch driver Free configurable as bridge or quad-switch Optimized for DC motor management applications Low RDS ON High side: 110 m typ. @ 25C, 270 m max. @ 150C Low side: 100 m typ. @ 25C, 230 m max. @ 150C Peak current: typ. 8A @ 25 C Very low quiescent current: typ. 5 A @ 25 C Small outline, enhanced power PG-DSO-package Operates up to 40 V PWM frequencies up to 1 kHz Status flag diagnosis Short-circuit-protection Overtemperature shut down with hysteresis Internal clamp diodes Under-voltage detection with hysteresis Green Product (RoHS compliant) AEC Qualified
* * * * * * * * * * * *
PG-DSO-28-22
Description The BTM7740G is part of the TrilithIC family containing three dies in one package: One double high-side switch and two low-side switches. The drains of these three vertical DMOS chips are mounted on separated lead frames. The sources are connected to individual pins, so the BTM7740G can be used in H-bridge- as well as in any other configuration. Both the double high-side and the two low-side switches of the BTM7740G are manufactured in SMART SIPMOS(R) technology which combines low RDS ON vertical DMOS power stages with CMOS circuitry for control, protection and diagnosis.
Type BTM7740G Data Sheet
Package PG-DSO-28-22 3
Marking BTM7740G Rev. 1.0, 2007-05-21
BTM7740G
2
2.1
Pin Configuration
Pin Assignment
DL1 IL1 DL1 N.C. DHVS GND IH1 ST IH2
1 2 3 LS-Leadframe 4 5 6 7 HS-Leadframe 8 9
28 DL1 27 SL1 26 SL1 25 DL1 24 DHVS 23 SH1 22 SH1 21 SH2 20 SH2 19 DHVS 18 DL2 LS-Leadframe 17 SL2 16 SL2 15 DL2
DHVS 10 N.C. 11 DL2 12 IL2 13 DL2 14
Figure 1
Pin Assignment BTM7740G (Top View)
Data Sheet
4
Rev. 1.0, 2007-05-21
BTM7740G
Table 1 Pin No. 1, 3, 25, 28 2 4 6 7 8 9 11 13 16,17 20,21 22,23 26,27
Pin Definitions and Functions Symbol Function DL1 IL1 N.C. GND IH1 ST IH2 N.C. IL2 SL2 SH2 SH1 SL1 Drain of low-side switch1, lead frame 1 1) Analog input of low-side switch1 not connected Drain of high-side switches and power supply voltage, lead frame 2 1) Ground Digital input of high-side switch1 Status of high-side switches; open Drain output Digital input of high-side switch2 not connected Drain of low-side switch2, lead frame 3 1) Analog input of low-side switch2 Source of low-side switch2 Source of high-side switch2 Source of high-side switch1 Source of low-side switch1
5, 10, 19, 24 DHVS
12, 14, 15, 18 DL2
1) To reduce the thermal resistance these pins are direct connected via metal bridges to the lead frame.
Pins written in bold type need power wiring.
Data Sheet
5
Rev. 1.0, 2007-05-21
BTM7740G
2.2
Terms
IS
VS=12V CS 470nF CL 100F
IFH1,2 DHVS IST LK IST ST
8 5,10,19,24
VDSH2 -VFH2 Diagnosis Biasing and Protection
VDSH1 -VFH1
VST VSTL VSTZ
IIH1
IH1
7
Gate Driver RO1 RO2
20,21 12,14,15,18
IIH1 VIH1 VIH2
SH2 DL2
ISH2 IDL2 IDL LK 2 VUVON VUVOFF
IH2 GND IGND ILKCL
9
Gate Driver
6
22,23
SH1 DL1
ISH1 IDL1 IDL LK 1
Protection IIL1 IL1
1,3,25,28
2
Gate Driver
Protection VIL1 VIL th 1 VIL2 VIL th 2
26,27
IIL2
IL2
13
Gate Driver
16,17
VDSL1 -VFL1
VDSL2 -VFL2
SL1 ISCP L 1 ISL1
SL2 ISCP L 2 ISL2
Figure 2 Table 2
Terms BTM7740G
HS-Source-Current
Named during Short Circuit
Named during Leakage-Cond.
ISH1,2
ISCP H
IDL LK
Data Sheet
6
Rev. 1.0, 2007-05-21
BTM7740G
3
Block Diagram
DHVS
5,10,19,24 8
ST Diagnosis Biasing and Protection
IH1
7
Gate Driver RO1 RO2
20,21
IH2 GND
9
Gate Driver
SH2
12,14,15,18
6
DL2
22,23
SH1 DL1
Protection
1,3,25,28
2
IL1
Gate Driver
Protection
13
IL2
26,27
Gate Driver
16,17
SL1
SL2
Figure 3
Block Diagram BTM7740G
Data Sheet
7
Rev. 1.0, 2007-05-21
BTM7740G
4
4.1
Circuit Description
Input Circuit
The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages. The inputs are protected by ESD clamp-diodes. The inputs IL1 and IL2 are connected to the internal gate-driving units of the N-channel vertical power-MOS-FETs.
4.2
Output Stages
The output stages consist of an low RDSON Power-MOS H-bridge. In H-bridge configuration, the D-MOS body diodes can be used for freewheeling when communicating inductive loads. If the high-side switches are used as single switches, positive and negative voltage spikes which occur when driving inductive loads are limited by integrated power clamp diodes.
4.3
Short Circuit Protection
The outputs are protected against - output short circuit to ground - output short circuit to the supply voltage, and - overload (load short circuit). An internal OP-Amp controls the Drain-Source-Voltage by comparing the DS-Voltage-Drop with an internal reference voltage. Above this trip point the OP-Amp reduces the output current depending on the junction temperature and the drop voltage.
4.4
Overtemperature Protection
The high-side and the low-side switches also incorporate an over temperature protection circuit with hysteresis which switches off the output transistors. In the case of the high-side switches, the status output is set to low.
4.5
Undervoltage Lockout
When VS reaches the switch-on voltage VUVON the IC becomes active with a hysteresis. The High-Side output transistors are switched off if the supply voltage VS drops below the switch off value VUVOFF.
4.6
Status Flag
The status flag output is an open drain output with zener-diode which requires a pull-up resistor, as shown in the application circuit in Figure 4 "Application Example BTM7740G" on Page 15. Various errors as listed in the table "Diagnosis" are reported by switching the open drain output ST to low.
Data Sheet
8
Rev. 1.0, 2007-05-21
BTM7740G
Table 3 Flag
Truth table and Diagnosis (valid only for the High-Side-Switches) IH1 0 0 1 1 0 1 X X 0 X 1 X IH2 0 1 0 1 X X 0 1 0 1 X X SH1 SH2 ST Remarks Outputs L L H H L L X X L L L L L H L H X X L L L L L L 1 1 1 1 1 0 1 0 1 0 0 1 stand-by mode switch2 active switch1 active both switches active detected detected detected detected not detected Inputs
Normal operation; identical with functional truth table
Overtemperature high-side switch1 Overtemperature high-side switch2 Overtemperature both high-side switches
Under voltage
Inputs: 0 = Logic LOW 1 = Logic HIGH X = don't care
Outputs: Z = Output in tristate condition L = Output in sink condition H = Output in source condition X = Voltage level undefined
Status: 1 = No error 0 = Error
Data Sheet
9
Rev. 1.0, 2007-05-21
BTM7740G
5
5.1
Electrical Characteristics
Absolute Maximum Ratings
Absolute Maximum Ratings1) - 40 C < Tj < 150 C Pos. Parameter Symbol Limit Values min. High-Side-Switches (Pins DHVS, IH1,2 and SH1,2) 5.1.1 5.1.2 5.1.3 5.1.4 5.1.5 5.1.6 5.1.7 5.1.8 5.1.9 5.1.10 5.1.11 5.1.12 5.1.13 5.1.14 5.1.15 5.1.16 5.1.17 5.1.18 5.1.19
1) 2) 3) 4)
Unit Remarks
max. 42 28
3)
Supply voltage Supply voltage for full short circuit protection HS-drain current2) HS-input current HS-input voltage Status pull up voltage Status Output current Drain-Source-Clamp voltage
VS VS(SCP) IS IIH VIH VST IST
- 0.3 - -7 -5 - 10 - 0.3 -5
V V A mA V V mA V V V A V C C kV kV kV kV
-
TA = 25C; tP < 100 ms
Pin IH1 and IH2 Pin IH1 and IH2
5 16 5.4 5 - 30 20
3)
Status Output ST Pin ST
Low-Side-Switches (Pins DL1,2, IL1,2 and SL1,2)
VDSL 42 Supply voltage for short circuit protection VDSL(SCP) -
- LS-drain current
2)
LS-input voltage Junction temperature Storage temperature Input LS-Switch Input HS-Switch Status HS-Switch Output LS and HS-Switch
IDL VIL Tj Tstg VESD VESD VESD VESD
-7 - 0.3 - 40 - 55 - - - -
VIL = 0 V; ID 1 mA VIL = 5 V VIL = 10 V TA = 25C; tP < 100 ms
- - -
10 150 150 2 1 2 8
Temperatures
ESD Protection4)
all other pins connected to Ground
Not subject to production test; specified by design Single pulse Internally limited ESD susceptibility HBM according to EIA/JESD22-A114-B (1.5k, 100pF)
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation.
Data Sheet
10
Rev. 1.0, 2007-05-21
BTM7740G
5.2
Pos. 5.2.20 5.2.21 5.2.22 5.2.23 5.2.24
Functional Range
Parameter Supply voltage Input voltage HS Input voltage LS Status output current Junction temperature Symbol Limit Values min. max. 42 15 10 2 150 V V V mA C After VS rising above VUVON - - - - Unit Remarks
VS VIH VIL IST Tj
VUVOFF
- 0.3 - 0.3 0 - 40
Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table
5.3
Pos. 5.3.25 5.3.26 5.3.27
Thermal Resistance
Parameter LS-junction to soldering point1) HS-junction to soldering point Junction to Ambient
1) 1)
Symbol Min.
Limit Values Typ. - - 36 Max. 20 20 - - - -
Unit K/W K/W K/W
Conditions measured to pin 3 or 12 measured to pin 19
2)
RthJA = Tj(HS) / (P(HS)+ P(LS))
RthJSP RthJSP RthJA
1) Not subject to production test, specified by design. 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70m Cu, 2 x 35m Cu).
Data Sheet
11
Rev. 1.0, 2007-05-21
BTM7740G
5.4
Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V < VS < 18 V unless otherwise specified
Pos.
Parameter
Symbol
Limit Values min. typ. 5 - 1.25 2.5 - - max. 9 13 2.5 5 6 10
Unit Test Condition
Current Consumption HS-switch 5.4.28 Quiescent current
IS
- -
A A mA mA A mA
IH1 = IH2 = 0 V Tj = 25 C IH1 = IH2 = 0 V IH1 or IH2 = 5 V VS = 12 V IH1 and IH2 = 5 V VS = 12 V
5.4.29 5.4.30 5.4.31 5.4.32
Supply current; one HS-switch active Supply current; both HS-switches active Leakage current of high-side switch Leakage current through logic GND in free wheeling condition Input current
IS IS ISH LK
- - -
ILKCL = IFH + - ISH IIL
- -
VIH = VSH = 0 V VS = 12 V IFH = 3 A VS = 12 V VIL = 5 V; normal operation VIL = 5 V;
failure mode
Current Consumption LS-switch 5.4.33 8 160 2 30 300 10 A A A
5.4.34
Leakage current of low-side switch
IDL LK
-
VIL = 0 V VDSL = 18 V VS increasing VS decreasing VUVON - VUVOFF IFH = 3 A IFL = 3 A ISH = 1 A; VS = 12 V Tj = 25 C ISH = 1 A; VS = 12 V Tj = 150 C ISL = 1 A; VIL = 5 V Tj = 25 C ISL = 1 A; VIL = 5 V Tj = 150 C
Under Voltage Lockout HS-switch 5.4.35 5.4.36 5.4.37 5.4.38 5.4.39 5.4.40 Switch-ON voltage Switch-OFF voltage Switch ON/OFF hysteresis Inverse diode of high-side switch; Forward-voltage Inverse diode of low-side switch; Forward-voltage Static drain-source on-resistance of high-side switch
VUVON VUVOFF VUVHY VFH VFL RDS ON H
- 1.8 - - - - -
- - 1 0.8 0.8 110 200 100 160
4.8 3.5 - 1.2 1.2 - 270 - 230
V V V V V m m m m
Output stages
5.4.41
Static drain-source on-resistance of low-side switch
RDS ON L
- -
Data Sheet
12
Rev. 1.0, 2007-05-21
BTM7740G
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V < VS < 18 V unless otherwise specified
Pos.
Parameter
Symbol
Limit Values min. typ. 9.5 8 6 22 17 15 10 180 170 10 0.2 - - max. 11 - 7.5 50 22 - 15 190 180 - 0.6 10 -
Unit Test Condition
Short Circuit of high-side switch to GND 5.4.42 Initial peak SC current tdel = 360 s; VS = 12 V; VDSH = 12V
ISCP H
8 - 5
A A A k A A A C C C V A V
Tj = - 40 C Tj = + 25 C Tj = + 150 C VDSL = 3 V Tj = - 40 C Tj = 25 C Tj = 150 C
Short Circuit of high-side switch to VS 5.4.43 5.4.44 Output pull-down-resistor Initial peak SC current VDSL = 12V; VIL = 5V; tdel = 250 s
1)
RO ISCP L
12 12 - 7
Short Circuit of low-side switch to VS
Thermal Shutdown 5.4.45 5.4.46 5.4.47 5.4.48 5.4.49 5.4.50
Thermal shutdown junction temperature Thermal switch-on junction temperature Temperature hysteresis Low output voltage Leakage current Zener-limit-voltage
Tj SD Tj SO
155 150 - - - 5.4
- -
= TjSD - TjSO
IST = 1.6 mA VST = 5 V IST = 1.6 mA
Status Flag Output ST of high-side switch
VST L IST LK VST Z
Data Sheet
13
Rev. 1.0, 2007-05-21
BTM7740G
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V < VS < 18 V unless otherwise specified
Pos.
Parameter
1)
Symbol
Limit Values min. typ. 85 80 - - 60 60 1 1 max. 180 180 1.2 1.6 150 150 1.5 1.5
Unit Test Condition
Switching times of high-side switch 5.4.51 5.4.52 5.4.53 5.4.54 5.4.55 5.4.56 5.4.57 5.4.58 Turn-ON-time to 90% VSH Turn-OFF-time to 10% VSH
Slew rate on 10 to 30% VSH Slew rate off 70 to 40% VSH
1)
tON tOFF dV/dtON
-dV/dtOFF
- - - - - - - -
s s V/s V/s s s
RLoad = 12 VS = 12 V
Switching times of low-side switch Turn-ON-time to 10% VDL Turn-OFF-time to 90% VDL Slew rate on 70 to 50% VDL Slew rate off 50 to 70% VDL
tON tOFF
-dV/dtON
RLoad = 10 VS = 12 V VIL = 0 to 5 V
dV/dtOFF
V/s RLoad = 4.7 V/s VS = 12 V VIL = 0 to 5 V V V V A A k V V - - -
Control Inputs of high-side switches IH 1, 2 5.4.59 5.4.60 5.4.61 5.4.62 5.4.63 5.4.64 5.4.65 5.4.66 H-input voltage L-input voltage Input voltage hysteresis H-input current L-input current Input series resistance Zener limit voltage Gate-threshold-voltage
VIH High VIH Low VIH HY IIH High IIH Low RI VIH Z VIL th
- 1 - 15 5 2.7 5.4 0.9
- - 0.3 30 - 4 - 1.7
2.5 - - 60 20 5.5 - 2.2
VIH = 5 V VIH = 0.4 V
-
IIH = 1.6 mA IDL = 2 mA
Control Inputs IL1, 2
1) Not subject to production test; specified by design
Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specified mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 C and the given supply voltage.
Data Sheet
14
Rev. 1.0, 2007-05-21
BTM7740G
6
Application Information
Note: The following simplified application examples are given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. The function of the described circuits must be verified in the real application
Watchdog Reset Q
TLE 4278G
D CD 47nF
I
VS=12V
RQ 100 k
CQ 22F
D01 Z39
CS 10F
WD R
VCC
DHVS
5,10,19,24
RS 10 k
ST
8
Diagnosis
Biasing and Protection
IH1
7
Gate Driver RO1 RO2
20,21 12,14,15,18
SH2 DL2
IH2 GND
9
Gate Driver
XC866 P
6
22,23
SH1 DL1
M
Protection IL1
1,3,25,28
2
Gate Driver
Protection IL2
13
Gate Driver
26,27 16,17
GND
SL1
SL2
In case of VDSL<-0.6V or reverse battery the current into the C might be limited by external resitors to protect the C
Figure 4
Application Example BTM7740G
Data Sheet
15
Rev. 1.0, 2007-05-21
BTM7740G
7
Package Outlines
2.65 max
0.35 x 45
+0.09
2.45 -0.2
0.2 -0.1
1.27 0.35 +0.15 2) 0.2 28x 28 15 0.1
0.4 +0.8 10.3 0.3
1 Index Marking
18.1 -0.4 1)
14
1) Does not include plastic or metal protrusions of 0.15 max rer side 2) Does not include dambar protrusion of 0.05 max per side
Figure 5
PG-DSO-28-22 (Plastic Transistor Single Outline Package)
Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 16
0.23
GPS05123
8 ma
Dimensions in mm
Rev. 1.0, 2007-05-21
x
7.6 -0.2 1)
BTM7740G
8
Rev. 1.0 Date
Revision History
Changes Initial Version
2007-05-21
Data Sheet
17
Rev. 1.0, 2007-05-21
Edition 2007-05-21 Published by Infineon Technologies AG 81726 Munich, Germany (c) 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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